Senior Communications Systems Engineer

Responsibilities

• Modem Architecture & Waveform Design: Define the overall architecture of the FSO modem, including choosing the modulation format and forward error correction (FEC) scheme to meet the link requirements. Conduct trade studies of various waveforms (e.g., BPSK, QPSK, 16-QAM or advanced modulation) and error-correction codes (LDPC, Turbo, or Polar codes) to optimize data rate versus link margin.
• DSP Algorithm Development: Develop and implement the digital signal processing algorithms required for transmit and receive. On the receiver side, this includes clock recovery, carrier recovery, frame synchronization, channel equalization, and demodulation algorithms. On the transmit side, generate pulses or I/Q signals with precise shaping (pulse shaping filters) and manage pre-emphasis or other compensation for the optical channel. 
• FPGA/Hardware Implementation: Implement the modem design on suitable hardware, primarily FPGA or SoC platforms for on-orbit deployment. Write RTL code (VHDL/Verilog) for the high-speed logic, ensuring timing closure at the required clock. 
• Testing and Verification: Develop test plans and verification infrastructure for the modem. This includes creating testbench simulations for the FPGA code and building automated test setups for the real hardware. Use tools like logic analyzers, high-speed oscilloscopes, and bit-error-rate testers to evaluate the end-to-end system. Perform lab tests with pseudo-random bit streams and channel emulators to ensure the modem achieves expected performance (throughput, BER) under various conditions (e.g. low OSNR, phase noise, dropout events). Validate that acquisition and re-acquisition times meet requirements.
• Integration with Photonics & Systems: Work closely with the Photonics engineer to interface the modem with the optical front-end. Define the analog electrical outputs (drive signals for modulators or input ranges for ADCs from photodetectors) and ensure the FPGA/ADC/DAC selection supports the bandwidth and resolution needed..
• Prototype and Evolve: In early stages, develop a “scrappy” modem prototype – possibly using software-defined radio (SDR) platforms or a PC-based testbed – to demonstrate basic communication over a laser link in the lab. Then iterate towards the final flight design, increasing sophistication of the DSP and moving to dedicated hardware. Support field demonstrations of the FSO link (e.g., a ground-to-ground test or a pilot on a high-altitude platform) by configuring your modem and analyzing performance data to drive improvements.

Minimum Qualifications

• Bachelor’s or Master’s in Electrical Engineering, Telecommunications, Computer Engineering or a related field. 
• 5+ years of experience in digital communications or signal processing design, developing modems, wireless communication systems, or high-speed data links.
• Solid understanding of communication system fundamentals such as digital modulation schemes, demodulation, error-control coding, information theory, and link budget analysis. Should be comfortable with concepts like constellations, eye diagrams, BER vs SNR, etc.
• Experience developing DSP algorithms for communications. This includes working with algorithms for timing recovery, carrier recovery, equalization, and FEC decoding. 
• Familiarity with modern FEC techniques (LDPC, BCH, Reed-Solomon, Turbo codes) and modulation formats used in optical/RF communication.
• Strong skills in HDL programming (VHDL/Verilog) and experience implementing designs on FPGAs or ASIC. 
• Proficiency with FPGA development toolchains (e.g., Xilinx Vivado or Intel Quartus) and simulation tools (ModelSim or similar). Able to create testbenches and perform thorough verification of RTL designs.
• Proficiency in simulation and modeling tools such as MATLAB/Simulink Python and/or C/C++ for developing and testing communication algorithms. Ability to translate high-level simulations into fixed-point implementations suitable for hardware. 
• Hands-on experience testing communication systems or high-speed digital systems in the lab. Familiarity with using oscilloscopes, logic analyzers, spectrum analyzers, or BERTs to debug and characterize digital communication links. 
• Able to systematically troubleshoot issues (timing glitches, noise, coding errors) at the interface of hardware and software.