Digital IC Design Engineer (EP-ESE-ME-2025-225-GRAP)

We are looking for a digital ASIC design engineer to work on the next generation of advanced MAPS particle-detector ASICs for the CERN detector complex. You will contribute to the design, implementation, and verification of high-performance digital readout and control circuits that meet demanding targets in speed, density, power efficiency, and radiation tolerance, while collaborating closely with analog and verification specialists.

Your responsibilities:

• Conceive and optimise system-level architectures and data processing strategies.
• Design, synthesise, and implement RTL, including timing closure and place & route of complex designs.
• Contribute to chip signoff through physical design checks (DRC, LVS, ERC) and power integrity analysis.
• Participate in formal verification using UVM methodologies.
• Manage the full RTL-to-GDS flow and physical signoff with professional EDA tools.
• Collaborate and communicate effectively within a multidisciplinary team.
• Learn and share knowledge, solve problems, and achieve results through teamwork.

Your profile:

• Experience in digital IC design with a strong understanding of VLSI principles.
• Experience in the design and implementation of digital or mixed-signal circuits in ASICs or FPGAs.
• Additionally, experience with digital simulation techniques and tools would be an advantage.

Skills:

• Proficiency in RTL design using hardware description languages (Verilog/SystemVerilog, VHDL).
• Proficiency in scripting languages (Python, TCL, Shell) and versioning tools (Git).
• Additionally, experience with functional verification methodologies (UVM/SystemVerilog) and simulation tools would be an advantage.
• Spoken and written English, with a commitment to learn French.

Eligibility criteria:

• You have a professional background in Electronics engineering (or a related field) and have either:
  • a Master's degree with 2 to 6 years of post-graduation professional experience;
  • or a PhD with no more than 3 years of post-graduation professional experience.
• You have never had a CERN fellow or graduate contract before.