Principal Analog Design Engineer

Architect, design and verify CMOS analog blocks for custom ASICs to meet stringent performance, area, power and timeline constraints. Blocks include Rx, Tx, PLL and miscellaneous high-precision analog circuits.

Responsibilities: 

• Analog Circuit Design: Lead the design, simulation, and validation of advanced analog circuits, including DDR I/O interfaces such as Rx, Tx, PLLs, Bandgap and high-speed mixed signal circuits in fine-geometry process.
• DDR I/O Design: Develop and optimize high-speed DDR I/O interfaces, ensuring signa integrity, noise immunity, and compatibility with industry standards.
• RX Design: Design and enhance analog receiver circuits, including CTLE, VGA, DFE, and slice focusing on performance metrics such as sensitivity, linearity, noise, and power consumption.
• Collaboration: Work closely with digital design engineers, systems engineers, and other stakeholders to ensure seamless integration of analog and digital components.
• Technical Leadership: Provide technical guidance and mentorship to junior engineers and contribute to the development of best practices and design methodologies.
• Design Verification: Conduct comprehensive simulations and testing to validate design performance and reliability. Address any issues and implement corrective actions as needed.
• Documentation: Create detailed design documentation, including specifications, schematics, and design reports. Ensure that all design activities are well-documented and comply with internal and external standards.
• Innovation: Stay abreast of industry trends and emerging technologies. Propose and implement innovative solutions to enhance product performance and capabilities with focus on low power circuit design.
• Circuit Reliability: Ensure designs meet EM/IR/Aging requirements.
• Layout: Ensure layouts meet high analog standards for matching and performance.