Memory Senior Modeling Engineer

Key Roles & Responsibilities

Memory View & Model Generation

• Develop, generate, and maintain the full set of memory views/models for the SRAM, ROM, and Register-File portfolio, ensuring correctness, completeness, and on-time delivery to consumer teams.
• Liberty Models: validate timing & power Liberty (.lib) models (NLDM/CCS) across all required PVT corners, ensuring correlation with SPICE/silicon and consistency with the memory specification.
• Memory Verilog Model: build behavioral Verilog/SystemVerilog models for memory instances and compilers, matching the functional, timing, and power-aware behavior of the hardware.

Model Verification

• Verilog Model Testing: set up and run model verification/regression environments, define test cases and equivalence checks to guarantee the Verilog models match specification and golden behavior.
• Debug model mismatches and drive root-cause analysis together with the design and CAD teams.

Design-for-Test (DFT)

• Tessent Description: create and validate memory descriptions for Siemens/Mentor Tessent to enable MBIST insertion, repair, and test of the memory blocks.
• TetraMAX: generate and debug ATPG patterns and fault coverage for memory and surrounding logic using Synopsys TetraMAX.
• FastScan: build scan/ATPG flows and analyze test coverage using Siemens/Mentor FastScan, aligning with the overall DFT strategy.

Automation & Methodology

• Automate the model-generation and QA flows (Perl/Python/TCL/Shell) and integrate them within the memory compiler / view-generation environment to improve robustness and turnaround time.
• Introduce and implement methodology improvements that enhance model quality and overall team efficiency.

Collaboration & Support

• Work in close cooperation with Memory Design, DFT, Physical Design, and STA teams to deliver on time and according to required specifications.
• Generate the required documentation, support consumers of the models, and contribute to the validation and debugging of fabricated silicon.
• Provide mentorship and technical guidance to junior modeling engineers.